The present work considers electro-thermal simulation of LDMOS devices and associated non-equilibrium effects. Simulations have been performed on three kinds of LDMOS i.e. bulk Si, partial SOI and full SOI. From the analysis, the extent of thermal non-equilibrium is determined from phonon temperature contours and electron energies in each case. The results indicate that, under similar operating conditions, non-equilibrium is more significant in the case of full SOI devices. Time development of acoustic phonon and lattice temperatures, obtained using two different heat source terms, was studied. This study provided insight into the difference between localized device heating in the electrically active region. The variation of optical and acoustic phonon temperatures with time is presented, and is used to identify time scales where thermal non-equilibrium would be significant.

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