The Impact of Interfacial Layers on the Thermal Boundary Resistance and Residual Stress in GaN on Si Epitaxial Layers

The development of gallium nitride (GaN) on silicon (Si) substrates is a critical technology for potential low cost power electronics. These devices can accommodate faster switching speeds, hotter temperatures, and high voltages needed for power electronics applications. However, the lattice mismatch and difference in crystal structure between 111 Si and c-axis hexagonal GaN requires the use of buffer layers in order to grow device quality epitaxial layers. For lateral high electron mobility transistors, these interfacial layers act as a potential source of increased thermal boundary resistance (TBR) which impedes heat flow out of the GaN on Si devices. In addition, these interfacial layers impact the growth and residual stress in the GaN epitaxial layer which can play a role in device reliability. In this work we use optical methods to experimentally measure a relatively low TBR for GaN on Si with an intermediate buffer layer to be 3.8 ± 0.4 m²K/GW. The effective TBR of a material stack that encompasses GaN on Si with a superlattice (SL) buffer is also measured, and is found to be 107 ± 1 m²K/GW. In addition the residual state of strain in the GaN layer is measured for both samples, and is found to vary significantly between them. Thermal conductivity of a 0.8μm GaN layer on AlN buffer is determined to be 126 ± 25 W/m-K, while a 0.84 μm GaN layer with C-doping on a SL structure is determined to be 112 ± 29 W/m-K.